/*This file is created by PINMAP tool
 *Device: Pike2_SC7731E
 *Version: SC7731_1_IRD_E_SCH_V1.0.0_PINMAP_V1.0
 *Creat Time: 2018/1/12 15:34:14
 *Author: weiwu.wang
 */

/*
 * Copyright (C) 2012 Spreadtrum Communications Inc.
 *
 * This software is licensed under the terms of the GNU General Public
 * License version 2, as published by the Free Software Foundation, and
 * may be copied, distributed, and modified under those terms.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <asm/io.h>
#include <asm/arch/pinmap.h>
#include <power/sprd_pmic/sprd_2720_pinmap.h>

#define BIT_PIN_SLP_ALL  (BIT_PIN_SLP_AP|BIT_PIN_SLP_PUBCP|BIT_PIN_SLP_WTLCP)
#define BIT_PIN_SLP_ALL_CP  (BIT_PIN_SLP_PUBCP|BIT_PIN_SLP_WTLCP)

static pinmap_t pinmap[]={
{REG_PIN_CTRL0,0x00000000},
{REG_PIN_CTRL1,0x00000240},
{REG_PIN_CTRL2,0x00438010},
{REG_PIN_CTRL3,0x00000400},
{REG_PIN_CTRL4,0x00000000},
{REG_PIN_CTRL5,0x00000000},


{REG_PIN_U0TXD,                         BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_U0TXD,                    BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_WPD|BIT_PIN_SLP_WPD},//NC
{REG_PIN_U0RXD,                         BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_U0RXD,                    BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_WPD|BIT_PIN_SLP_WPD},//NC
{REG_PIN_U0CTS,                         BITS_PIN_AF(3)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_U0CTS,                    BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_WPD|BIT_PIN_SLP_WPD},//NC
{REG_PIN_U0RTS,                         BITS_PIN_AF(2)|BIT_PIN_SLP_AP|BIT_PIN_SLP_IE},
{REG_MISC_PIN_U0RTS,                    BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_WPU|BIT_PIN_SLP_WPU},//BUA_BAT_DET
{REG_PIN_MTCK_ARM,                      BITS_PIN_AF(0)|BIT_PIN_SLP_NONE|BIT_PIN_SLP_Z},
{REG_MISC_PIN_MTCK_ARM,                 BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_WPU|BIT_PIN_SLP_WPD},//MTCK(SIM1_DET)
{REG_PIN_MTMS_ARM,                      BITS_PIN_AF(0)|BIT_PIN_SLP_NONE|BIT_PIN_SLP_Z},
{REG_MISC_PIN_MTMS_ARM,                 BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_WPU|BIT_PIN_SLP_WPD},//MTMS(SIM0_DET)
{REG_PIN_PTEST,                         BITS_PIN_AF(0)|BIT_PIN_SLP_ALL|BIT_PIN_SLP_Z},
{REG_MISC_PIN_PTEST,                    BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_WPD|BIT_PIN_SLP_WPD},//GND
{REG_PIN_ANA_INT,                       BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_IE},
{REG_MISC_PIN_ANA_INT,                  BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//ANA_INT
{REG_PIN_EXT_RST_B,                     BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_IE},
{REG_MISC_PIN_EXT_RST_B,                BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//EXT_RST_B
{REG_PIN_CHIP_SLEEP,                    BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_CHIP_SLEEP,               BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//CHIP_SLEEP
{REG_PIN_CLK_32K,                       BITS_PIN_AF(0)|BIT_PIN_SLP_ALL|BIT_PIN_SLP_IE},
{REG_MISC_PIN_CLK_32K,                  BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//CLK_32K
{REG_PIN_AUD_SCLK,                      BITS_PIN_AF(0)|BIT_PIN_SLP_ALL|BIT_PIN_SLP_OE},
{REG_MISC_PIN_AUD_SCLK,                 BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//AUD_SCLK
{REG_PIN_AUD_ADD0,                      BITS_PIN_AF(0)|BIT_PIN_SLP_ALL|BIT_PIN_SLP_IE},
{REG_MISC_PIN_AUD_ADD0,                 BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//AUD_ADD0
{REG_PIN_AUD_ADSYNC,                    BITS_PIN_AF(0)|BIT_PIN_SLP_ALL|BIT_PIN_SLP_IE},
{REG_MISC_PIN_AUD_ADSYNC,               BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//AUD_ADSYNC
{REG_PIN_AUD_DAD1,                      BITS_PIN_AF(0)|BIT_PIN_SLP_ALL|BIT_PIN_SLP_OE},
{REG_MISC_PIN_AUD_DAD1,                 BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//AUD_DAD1
{REG_PIN_AUD_DAD0,                      BITS_PIN_AF(0)|BIT_PIN_SLP_ALL|BIT_PIN_SLP_OE},
{REG_MISC_PIN_AUD_DAD0,                 BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//AUD_DAD0
{REG_PIN_AUD_DASYNC,                    BITS_PIN_AF(0)|BIT_PIN_SLP_ALL|BIT_PIN_SLP_OE},
{REG_MISC_PIN_AUD_DASYNC,               BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//AUD_DASYNC
{REG_PIN_ADI_D,                         BITS_PIN_AF(0)|BIT_PIN_SLP_NONE|BIT_PIN_SLP_Z},
{REG_MISC_PIN_ADI_D,                    BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_WPD},//ADI_D
{REG_PIN_ADI_SYNC,                      BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_ADI_SYNC,                 BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_WPD|BIT_PIN_SLP_WPD},//NC
{REG_PIN_ADI_SCLK,                      BITS_PIN_AF(0)|BIT_PIN_SLP_NONE|BIT_PIN_SLP_Z},
{REG_MISC_PIN_ADI_SCLK,                 BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_WPD},//ADI_SCLK
{REG_PIN_SIMDA0,                        BITS_PIN_AF(0)|BIT_PIN_SLP_PUBCP|BIT_PIN_SLP_IE},
{REG_MISC_PIN_SIMDA0,                   BITS_PIN_DS(1)|BIT_PIN_WPUS|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//SIM0_DA
{REG_PIN_SIMCLK0,                       BITS_PIN_AF(0)|BIT_PIN_SLP_PUBCP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_SIMCLK0,                  BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//SIM0_CLK
{REG_PIN_SIMRST0,                       BITS_PIN_AF(0)|BIT_PIN_SLP_PUBCP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_SIMRST0,                  BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//SIM0_RST
{REG_PIN_SIMDA1,                        BITS_PIN_AF(0)|BIT_PIN_SLP_PUBCP|BIT_PIN_SLP_IE},
{REG_MISC_PIN_SIMDA1,                   BITS_PIN_DS(1)|BIT_PIN_WPUS|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//SIM1_DA
{REG_PIN_SIMRST1,                       BITS_PIN_AF(0)|BIT_PIN_SLP_PUBCP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_SIMRST1,                  BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//SIM1_RST
{REG_PIN_SIMCLK1,                       BITS_PIN_AF(0)|BIT_PIN_SLP_PUBCP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_SIMCLK1,                  BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//SIM1_CLK
{REG_PIN_SIMCLK2,                       BITS_PIN_AF(3)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_SIMCLK2,                  BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_WPD|BIT_PIN_SLP_WPD},//NC
{REG_PIN_SIMDA2,                        BITS_PIN_AF(3)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_SIMDA2,                   BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_WPD|BIT_PIN_SLP_WPD},//NC
{REG_PIN_SIMRST2,                       BITS_PIN_AF(3)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_SIMRST2,                  BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_WPD|BIT_PIN_SLP_WPD},//NC
{REG_PIN_NF_DATA_2,                     BITS_PIN_AF(3)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_NF_DATA_2,                BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_WPD|BIT_PIN_SLP_WPD},//NC
{REG_PIN_NF_DATA_1,                     BITS_PIN_AF(3)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_NF_DATA_1,                BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_WPD|BIT_PIN_SLP_WPD},//NC
{REG_PIN_NF_DATA_0,                     BITS_PIN_AF(3)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_NF_DATA_0,                BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_WPD|BIT_PIN_SLP_WPD},//NC
{REG_PIN_NF_WEN,                        BITS_PIN_AF(3)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_NF_WEN,                   BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_WPD|BIT_PIN_SLP_WPD},//NC
{REG_PIN_NF_CEN0,                       BITS_PIN_AF(3)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_NF_CEN0,                  BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_WPD|BIT_PIN_SLP_WPD},//NC
{REG_PIN_EMMC_DUMMY,                    BITS_PIN_AF(0)|BIT_PIN_SLP_ALL|BIT_PIN_SLP_Z},
{REG_MISC_PIN_EMMC_DUMMY,               BITS_PIN_DS(3)|BIT_PIN_NULL|BIT_PIN_WPD|BIT_PIN_SLP_WPD},//No Ball
{REG_PIN_EMMC_D0,                       BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_EMMC_D0,                  BITS_PIN_DS(3)|BIT_PIN_NULL|BIT_PIN_WPU|BIT_PIN_SLP_WPD},//EMMC_D0
{REG_PIN_EMMC_D1,                       BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_EMMC_D1,                  BITS_PIN_DS(3)|BIT_PIN_NULL|BIT_PIN_WPU|BIT_PIN_SLP_WPD},//EMMC_D1
{REG_PIN_EMMC_D2,                       BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_EMMC_D2,                  BITS_PIN_DS(3)|BIT_PIN_NULL|BIT_PIN_WPU|BIT_PIN_SLP_WPD},//EMMC_D2
{REG_PIN_EMMC_D3,                       BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_EMMC_D3,                  BITS_PIN_DS(3)|BIT_PIN_NULL|BIT_PIN_WPU|BIT_PIN_SLP_WPD},//EMMC_D3
{REG_PIN_EMMC_D4,                       BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_EMMC_D4,                  BITS_PIN_DS(3)|BIT_PIN_NULL|BIT_PIN_WPU|BIT_PIN_SLP_WPD},//EMMC_D4
{REG_PIN_EMMC_D5,                       BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_EMMC_D5,                  BITS_PIN_DS(3)|BIT_PIN_NULL|BIT_PIN_WPU|BIT_PIN_SLP_WPD},//EMMC_D5
{REG_PIN_EMMC_D6,                       BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_EMMC_D6,                  BITS_PIN_DS(3)|BIT_PIN_NULL|BIT_PIN_WPU|BIT_PIN_SLP_WPD},//EMMC_D6
{REG_PIN_EMMC_D7,                       BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_EMMC_D7,                  BITS_PIN_DS(3)|BIT_PIN_NULL|BIT_PIN_WPU|BIT_PIN_SLP_WPD},//EMMC_D7
{REG_PIN_EMMC_CLK,                      BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_EMMC_CLK,                 BITS_PIN_DS(3)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//EMMC_CLK
{REG_PIN_EMMC_DS,                       BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_IE},
{REG_MISC_PIN_EMMC_DS,                  BITS_PIN_DS(3)|BIT_PIN_NULL|BIT_PIN_WPD|BIT_PIN_SLP_WPD},//EMMC_RCLK
{REG_PIN_EMMC_CMD,                      BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_EMMC_CMD,                 BITS_PIN_DS(3)|BIT_PIN_NULL|BIT_PIN_WPU|BIT_PIN_SLP_WPD},//EMMC_CMD
{REG_PIN_EMMC_RST,                      BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_EMMC_RST,                 BITS_PIN_DS(3)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//EMMC_RST
{REG_PIN_LCM_RSTN,                      BITS_PIN_AF(3)|BIT_PIN_SLP_AP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_LCM_RSTN,                 BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//LCM_RSTN
{REG_PIN_DSI_TE,                        BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_IE},
{REG_MISC_PIN_DSI_TE,                   BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_WPD|BIT_PIN_SLP_WPD},//LCM_FMARK
{REG_PIN_SCL0,                          BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_SCL0,                     BITS_PIN_DS(1)|BIT_PIN_WPUS|BIT_PIN_WPU|BIT_PIN_SLP_WPU},//I2C0_SCL
{REG_PIN_SDA0,                          BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_SDA0,                     BITS_PIN_DS(1)|BIT_PIN_WPUS|BIT_PIN_WPU|BIT_PIN_SLP_WPU},//I2C0_SDA
{REG_PIN_CMMCLK0,                       BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_CMMCLK0,                  BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//CAM_MCLK0
{REG_PIN_CMRST0,                        BITS_PIN_AF(3)|BIT_PIN_SLP_AP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_CMRST0,                   BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//CAM_RST0
{REG_PIN_CMPD0,                         BITS_PIN_AF(3)|BIT_PIN_SLP_AP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_CMPD0,                    BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//CAM_PWDN0
{REG_PIN_CMPD1,                         BITS_PIN_AF(3)|BIT_PIN_SLP_AP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_CMPD1,                    BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//CAM_PWDN1
{REG_PIN_SD0_CLK0,                      BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_SD0_CLK0,                 BITS_PIN_DS(7)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//TF_SD0_CLK
{REG_PIN_SD0_CMD,                       BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_SD0_CMD,                  BITS_PIN_DS(4)|BIT_PIN_NULL|BIT_PIN_WPU|BIT_PIN_SLP_WPD},//TF_SD0_CMD
{REG_PIN_SD0_D0,                        BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_SD0_D0,                   BITS_PIN_DS(4)|BIT_PIN_NULL|BIT_PIN_WPU|BIT_PIN_SLP_WPD},//TF_SD0_D0
{REG_PIN_SD0_D1,                        BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_SD0_D1,                   BITS_PIN_DS(4)|BIT_PIN_NULL|BIT_PIN_WPU|BIT_PIN_SLP_WPD},//TF_SD0_D1
{REG_PIN_SD0_D2,                        BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_SD0_D2,                   BITS_PIN_DS(4)|BIT_PIN_NULL|BIT_PIN_WPU|BIT_PIN_SLP_WPD},//TF_SD0_D2
{REG_PIN_SD0_D3,                        BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_SD0_D3,                   BITS_PIN_DS(4)|BIT_PIN_NULL|BIT_PIN_WPU|BIT_PIN_SLP_WPD},//TF_SD0_D3
{REG_PIN_SD0_DUMMY,                     BITS_PIN_AF(0)|BIT_PIN_SLP_ALL|BIT_PIN_SLP_Z},
{REG_MISC_PIN_SD0_DUMMY,                BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_WPD|BIT_PIN_SLP_WPD},//No Ball
{REG_PIN_IIS0CLK,                       BITS_PIN_AF(3)|BIT_PIN_SLP_AP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_IIS0CLK,                  BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//CAM_RST1
{REG_PIN_IIS0LRCK,                      BITS_PIN_AF(3)|BIT_PIN_SLP_AP|BIT_PIN_SLP_IE},
{REG_MISC_PIN_IIS0LRCK,                 BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_WPU|BIT_PIN_SLP_WPU},//LCM_ID
{REG_PIN_IIS0DI,                        BITS_PIN_AF(3)|BIT_PIN_SLP_AP|BIT_PIN_SLP_IE},
{REG_MISC_PIN_IIS0DI,                   BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//BOARD_ID0
{REG_PIN_IIS0DO,                        BITS_PIN_AF(3)|BIT_PIN_SLP_AP|BIT_PIN_SLP_IE},
{REG_MISC_PIN_IIS0DO,                   BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//BOARD_ID1
{REG_PIN_U1RXD,                         BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_IE},
{REG_MISC_PIN_U1RXD,                    BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_WPU|BIT_PIN_SLP_WPU},//BB_U1RXD
{REG_PIN_U1TXD,                         BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_U1TXD,                    BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//BB_U1TXD
{REG_PIN_KEYIN0,                        BITS_PIN_AF(1)|BIT_PIN_SLP_AP|BIT_PIN_SLP_IE},
{REG_MISC_PIN_KEYIN0,                   BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_WPU|BIT_PIN_SLP_WPU},//KEYIN0
{REG_PIN_KEYIN1,                        BITS_PIN_AF(1)|BIT_PIN_SLP_AP|BIT_PIN_SLP_IE},
{REG_MISC_PIN_KEYIN1,                   BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_WPU|BIT_PIN_SLP_WPU},//KEYIN1
{REG_PIN_KEYIN2,                        BITS_PIN_AF(3)|BIT_PIN_SLP_AP|BIT_PIN_SLP_IE},
{REG_MISC_PIN_KEYIN2,                   BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_WPD|BIT_PIN_SLP_WPD},//AG_INT0
{REG_PIN_KEYOUT0,                       BITS_PIN_AF(3)|BIT_PIN_SLP_AP|BIT_PIN_SLP_IE},
{REG_MISC_PIN_KEYOUT0,                  BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_WPU|BIT_PIN_SLP_WPU},//SUBCAM_ID
{REG_PIN_KEYOUT1,                       BITS_PIN_AF(3)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_KEYOUT1,                  BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_WPD|BIT_PIN_SLP_WPD},//NC
{REG_PIN_KEYOUT2,                       BITS_PIN_AF(1)|BIT_PIN_SLP_AP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_KEYOUT2,                  BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//LCM_BL_PWM
{REG_PIN_LNA_EN,                        BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_LNA_EN,                   BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_WPD|BIT_PIN_SLP_WPD},//GPS_LNA_EN
{REG_PIN_SPI_HS_DO,                     BITS_PIN_AF(3)|BIT_PIN_SLP_AP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_SPI_HS_DO,                BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_WPD},//PRECHARGE_LED
{REG_PIN_SPI_HS_DI,                     BITS_PIN_AF(3)|BIT_PIN_SLP_AP|BIT_PIN_SLP_IE},
{REG_MISC_PIN_SPI_HS_DI,                BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_WPU|BIT_PIN_SLP_WPU},//MCAM_ID
{REG_PIN_SPI_HS_CLK,                    BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_SPI_HS_CLK,               BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_WPD|BIT_PIN_SLP_WPD},//NC
{REG_PIN_SPI_HS_CSN,                    BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_SPI_HS_CSN,               BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_WPD|BIT_PIN_SLP_WPD},//NC
{REG_PIN_EXTINT1,                       BITS_PIN_AF(3)|BIT_PIN_SLP_AP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_EXTINT1,                  BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//CTP_RST
{REG_PIN_EXTINT0,                       BITS_PIN_AF(3)|BIT_PIN_SLP_AP|BIT_PIN_SLP_IE},
{REG_MISC_PIN_EXTINT0,                  BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_WPU|BIT_PIN_SLP_WPU},//CTP_INT
{REG_PIN_SCL2,                          BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_SCL2,                     BITS_PIN_DS(3)|BIT_PIN_WPUS|BIT_PIN_WPU|BIT_PIN_SLP_WPU},//CTP_SCL
{REG_PIN_SDA2,                          BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_SDA2,                     BITS_PIN_DS(3)|BIT_PIN_WPUS|BIT_PIN_WPU|BIT_PIN_SLP_WPU},//CTP_SDA
{REG_PIN_SCL1,                          BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_SCL1,                     BITS_PIN_DS(1)|BIT_PIN_WPUS|BIT_PIN_WPU|BIT_PIN_SLP_WPU},//I2C1_SCL
{REG_PIN_SDA1,                          BITS_PIN_AF(0)|BIT_PIN_SLP_AP|BIT_PIN_SLP_Z},
{REG_MISC_PIN_SDA1,                     BITS_PIN_DS(1)|BIT_PIN_WPUS|BIT_PIN_WPU|BIT_PIN_SLP_WPU},//I2C1_SDA
{REG_PIN_RFCTL11,                       BITS_PIN_AF(0)|BIT_PIN_SLP_ALL_CP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_RFCTL11,                  BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//NC
{REG_PIN_RFCTL10,                       BITS_PIN_AF(0)|BIT_PIN_SLP_ALL_CP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_RFCTL10,                  BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//RFCTL_10
{REG_PIN_RFCTL9,                        BITS_PIN_AF(0)|BIT_PIN_SLP_ALL_CP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_RFCTL9,                   BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//RFCTL_9
{REG_PIN_RFCTL8,                        BITS_PIN_AF(0)|BIT_PIN_SLP_ALL_CP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_RFCTL8,                   BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//RFCTL_8
{REG_PIN_RFCTL7,                        BITS_PIN_AF(0)|BIT_PIN_SLP_ALL_CP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_RFCTL7,                   BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//RFCTL_7
{REG_PIN_RFCTL6,                        BITS_PIN_AF(0)|BIT_PIN_SLP_ALL_CP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_RFCTL6,                   BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//RFCTL_6
{REG_PIN_RFCTL5,                        BITS_PIN_AF(0)|BIT_PIN_SLP_ALL_CP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_RFCTL5,                   BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//RFCTL_5
{REG_PIN_RFCTL4,                        BITS_PIN_AF(0)|BIT_PIN_SLP_ALL_CP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_RFCTL4,                   BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//RFCTL_4
{REG_PIN_RFCTL3,                        BITS_PIN_AF(0)|BIT_PIN_SLP_ALL_CP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_RFCTL3,                   BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//RFCTL_3
{REG_PIN_RFCTL2,                        BITS_PIN_AF(0)|BIT_PIN_SLP_ALL_CP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_RFCTL2,                   BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//RFCTL_2
{REG_PIN_RFCTL1,                        BITS_PIN_AF(0)|BIT_PIN_SLP_ALL_CP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_RFCTL1,                   BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//RFCTL_1
{REG_PIN_RFCTL0,                        BITS_PIN_AF(0)|BIT_PIN_SLP_ALL_CP|BIT_PIN_SLP_OE},
{REG_MISC_PIN_RFCTL0,                   BITS_PIN_DS(1)|BIT_PIN_NULL|BIT_PIN_NUL|BIT_PIN_SLP_NUL},//RFCTL_0
};

/*here is the adie pinmap such as 2720*/
static pinmap_t adie_pinmap[]={
{REG_PIN_ANA_EXT_XTL_EN0,		BITS_ANA_PIN_DS(1)|BIT_ANA_PIN_WPD|BIT_ANA_PIN_SLP_IE},//NC
{REG_PIN_ANA_EXT_XTL_EN1,		BITS_ANA_PIN_DS(1)|BIT_ANA_PIN_WPD|BIT_ANA_PIN_SLP_IE},//NC
{REG_PIN_ANA_EXT_XTL_EN2,		BITS_ANA_PIN_DS(1)|BIT_ANA_PIN_WPD|BIT_ANA_PIN_SLP_IE},//NC
{REG_PIN_ANA_EXT_XTL_EN3,		BITS_ANA_PIN_DS(1)|BIT_ANA_PIN_WPD|BIT_ANA_PIN_SLP_IE},//NC
{REG_PIN_ANA_PTESTO,            BITS_ANA_PIN_DS(1)|BIT_ANA_PIN_NUL|BITS_ANA_PIN_AF(1)|BIT_ANA_PIN_SLP_OE},//BUA_BAT_DET
};

int  pin_init(void)
{
	int i;
	for (i = 0; i < sizeof(pinmap)/sizeof(pinmap[0]); i++) {
		__raw_writel(pinmap[i].val, CTL_PIN_BASE + pinmap[i].reg);
	}

	for (i = 0; i < sizeof(adie_pinmap)/sizeof(adie_pinmap[0]); i++) {
		sci_adi_set(CTL_ANA_PIN_BASE + adie_pinmap[i].reg, adie_pinmap[i].val);
	}

	return 0;
}

